This learning course extensively deals with the concept of memory and programmable logic devices, concepts of VHDL and data flow modelling, different logic families and data converters.
Introduction to memories - Introduction to memories. Types of memories - Types of memories. Random Access Memory (RAM) - Introduction of Random Access Memory, Static RAM, Dynamic RAM, Comparison between SRAM and DRAM. Read Only Memory (ROM) - Introduction of Read Only Memory, Types of ROMs, PROM (Programmable Read Only Memory), EPROM (Erasable Programmable Read Only Memory), EEPROM (Electrically Erasable Programmable Read Only Memory), Comparison of EPROM and EEPROM, Difference between UVPROM and EEPROM, Comparison between RAM and ROM, Types of ROM and RAM ICs, Flash Memory, CD-ROM. Memory Decoding - Introduction of Memory Decoding. Memory Expansion - Expanding Word Size, Expanding Memory Capacity. Error detection and correction - Error detection and correction, Number of parity bits, Locations of the parity bits in the code, Assigning values to parity bits, Detecting and Correcting an error. Data bus and Address bus - The bus, Data bus, Address bus. Sequential memory - Sequential memory. Cache memory - Introduction of cache memory, Operation of cache, Mapping function of cache. Circuit diagram using CMOS transistors – Introduction, Static Read/Write Access Memory (SRAM), Dynamic Read-Write Access Memory (DRAM). Programmable logic devices (PLD's) - Introduction of Programmable Logic Devices (PLDs), Programmable Read Only Memory (PROM), PLA (Programmable Logic Array), Programmable Array Logic Devices. Programmable logic arrays - PLA (Programmable Logic Array). Field Programmable gate arrays (FPGA's) – Introduction, Architecture of FPGA, Xilinx XC4000 FPGA Family, XC4000 Architecture. Memory hierarchy - Memory hierarchy in terms of capacity, Access method. Sequential programmable devices - Sequential programmable devices, Sequential programmable logic devices (SPLD’s), Complex programmable logic devices (CPLD’s), Field Programmable Gate Array (FPGA). Implementation of combinational logic circuits - Implementation of combinational logic circuit using PROM, Implementation of combinational logic circuit using PLA, Implementation of combinational logic circuit using PAL. Application Specific Integrated Circuits (ASICs) - Introduction to ASIC, Approaches to ASIC manufacture, User programmed ASICs.
Hierarchy modeling Concepts - Design methodologies, Modules, Instances, Components of simulation. Introduction to HDL - Need of HDL, History of HDL. Introduction to VHDL - Introduction to VHDL, Structure of verilog module, Important points to remember while representing any module using Verilog HDL. Structure of VHDL module - Structure of the VHDL module, Package, Entity, Architecture, Configuration. RTL design - RTL design process. HDL for combinational logic - HDL for combinational circuits, Structure of the data flow description, Signal declaration and assignment statement, Execution of assignment statement, Data type – vectors, 4-bit Ripple-Carry and Carry-Look ahead Adder, Structure of the HDL behavioral descriptions, Sequential statements, Loop statement, While – loop statement, Repeat statement, Forever statement, Gate Level / Structural description. HDL for sequential logic - Description of D-latch, Description of Flip-flops, Description of sequential circuits, Description of Moore circuit, HDL for registers and counters, Descriptions of registers in Verilog HDL, Structural model of a universal shift register, Description of counters. Operators in VHDL - Operators in Verilog HDL, Logical operators, Relational operators, Arithmetic operators, Shift and rotate operators, Operator precedence. Data types - VHDL data types, Scalar types, Composite types, Access and file types, Other types, Verilog data types. Styles or types of descriptions - Types of descriptions, Behavioral descriptions, Dataflow design, Structural descriptions, Switch-level descriptions, Mixed-type descriptions, Mixed language descriptions. Packages – Packages. Subprograms – Subprograms, Function definition, Procedure definition, Language aspects of subprograms, Nesting subprograms. Test benches – Test benches, Half adder test bench. Simulation and synthesis – Synthesis, Simulation. Comparison of VHDL and Verilog - Comparison of VHDL and Verilog. Data flow description - Data flow description, Signal declaration and assignment statement, Execution of assignment statement, Constant declaration and assignment statement, Dataflow description of a Half-adder, Multiplexer with active low enable. Data type vectors - Data type – vectors, HDL codes for 4 × 1 multiplexer, HDL codes for 2 × 2 unsigned combination array multiplier, HDL codes for D-latch, HDL codes for 2-bit magnitude comparator, HDL code for 4-bit ripple-carry adder, HDL code for carry-look ahead adder. Simulation/Tutorial examples - Design of multiplexers, Design of counters, Design of full adders, Design of de-multiplexer, Design of flip-flops, Design of FSM.
Introduction to Digital ICs - Introduction to digital logic family, Logic families, CMOS logic levels, Specifications of digital ICs. Characteristics of logic families – Introduction, Speed of Operation, Power Dissipation, Figure of Merit, Fan-Out, Current and Voltage Parameters, Noise Immunity, Operating Temperature and Power Supply Requirements, Flexibilities Available. RTL logic family - RTL circuits. DTL logic family - Diode Transistor logic (DTL). Introduction to TTL logic family - Transistor Transistor Logic (TTL), 3-input TTL NAND Gate, Input and Output Currents Fan-out, Standard TTL Characteristics, High-Speed (H) and Low-Power (L) TTL, Schottky TTL, Comparison of TTL Series Characteristics, Open Collector Output, Wired-AND Connection, Tri-state Gates, TTL NOR Gate, Comparison of TTL Series Characteristics. Emitter Coupled Logic (ECL) - Introduction to ECL, Basic ECL Circuit, ECL OR/NOR Gate, ECL 10K Family, ECL 100 K Family, Interfacing CMOS and TTL with ECL Gates. TTL NAND gate - TTL NAND gate, Open collector TTL NAND gate, TTL NAND gate with totem pole output. CMOS NAND gate - Basic CMOS inverter circuit, CMOS NAND gate, Digital IC logic gates, 4000 series CMOS logic ICs. MOS logic families - Introduction to MOS transistor, MOS Logic Families. Realization of NMOS inverter - NMOS Inverter, NMOS NAND Gate, NMOS NOR Gate. Realization of PMOS inverter - PMOS Logic, Performance. Realization of CMOS inverter - Basic CMOS inverter circuit, CMOS NAND Gate, CMOS NOR Gate, FAN in and FAN out, CMOS Characteristics. Comparison between different logic families - Comparison between different logic families. Interfacing of ICs of different logic families - Interfacing TTL and CMOS families, Comparison between CMOS and TTL families. Logic Hazards – Hazards, Design of hazard free switching circuit.
Need for A/D and D/A converters - Need for A/D converters - Definition of A/D and D/A converters. Basic principle of D/A conversion - Basic principle of DAC - Specifications of D/A converter. Weighted resistor DAC - Weighted resistor DAC - Disadvantages of weighted resistor DAC. R-2R ladder network DAC - R-2R ladder type D/A converter. Principle, specification and Application of ADC - Basic principle of ADC, Specification of ADC. Counter A/D converter - Counter A/D converter. Successive approximate method - Successive approximation ADC. Dual slope ADC - Dual slope ADC.
